1. Field of the Invention
The present invention relates to a time-division switch control system of a digital switching system, and more specifically, to a switch control system for a T-S-T (time switch-space switch-time switch) 3-staged structure switching network controlled by a plurality of control processors (a multi-processor type digital switching system.)
2. Description of the Related Art
In the digital switching system, data to be switched is flowed into the switching network in the form of series of time slots through an incoming highway, and necessary switching operation for each time slot is performed and output from the switching network through an outgoing highway.
FIG. 5 is a block diagram illustrating the principle of time slot switching by a T-S-T 3-staged structure switching network which can provides a large capacity switching network. The incoming highway from a line circuit 310-31N is coupled to a first stage time switch 110-11N, and junctor highways HW10-HW1N from each of first stage time switches 110-11N are coupled to a second stage space switch 200. Each of junctor highways HW20-HW2N from the second stage space switch 200 are coupled to each of third stage time switches 120-12N respectively. The outgoing highway from a third stage time switch 120-12N is coupled to a line circuit 320-32N. Each line circuit is coupled to a subscriber terminal 1-N, or 10-1N.
Under these configurations, the principle of switching is like this; the time switch exchanges data in a certain time slot number to a different time slot number, and the space switch exchanges data in a certain time slot number of a certain junctor highway number to a same time slot number of a different junctor highway number.
For more detail, operation performed by the T-S-T 3-staged structure switching network will be explained with reference to FIG. 5.
It is assumed that a communication path is to be established between a subscriber terminal 1 connected to the line circuit 310 and a subscriber terminal 1L connected to the line circuit 32L.
In the digital switching system, a time slot number of the originating subscriber (subscriber terminal 1) on the incoming highway is known as the originating subscriber accommodated position which has informed by a peripheral unit of the digital switching system at the time of call origination request by the subscriber terminal 1, and the time slot number on the incoming highway is assumed as No. k. And also, a time slot number of the terminating subscriber (subscriber terminal 1L) on the outgoing highway and the junctor highway number corresponding to the outgoing highway are known as the result of analysis of the dialled number by the subscriber terminal 1, and the time slot number on the outgoing highway is assumed as No. 1 and the corresponding junctor highway number is assumed as No. HW2L. Therefore, switching is to be performed by exchanging data in the time slot number k on the incoming highway corresponding to the junctor highway HW10 to the time slot number 2 on the outgoing highway corresponding to junctor highway HW2L.
The digital switching system searches a time slot number which is idle state on both junctor highways HW10 and HW2L, and it is assumed that time slot number 2 is available for both junctor highways and the time slot number 2 is reserved for communication path establishment.
After that, the digital switching system instructs the first stage time switch 110 to exchange data in the time slot number k on the incoming highway from the subscriber terminal 1 to the time slot number 2 on the junctor highway HW10, instructs the second stage space switch 200 to exchange data in the time slot number 2 from the junctor highway HW10 to the junctor highway HW2L, and also instructs the third stage time switch 12L to exchange data in the time slot number 2 on the junctor highway HW2L to the time slot number 1 on the outgoing highway to the subscriber terminal 1L.
The T-S-T 3-staged structure switching network of a conventional multi-processor type digital switching system employs such a configuration, as shown in FIG. 6, that the first stage time switch 110 and the third stage time switch 120 are equipped in a one time switch module 100 together with a control processor 130 for controlling those time switches, and a plurality of time switch modules 100-10N are provided depending on number of subscriber terminals 1-N, 10-1N and junction circuits (not shown) to/from other switching systems which are accommodated in this digital switching system, and also a plurality of second stage space switches 210-21N are equipped in a space switch module 200 together with a control processor 230 for controlling those space switches. That is, a plurality of control processors 130-13N, 230 are installed in a distributed manner in each time switch module 100-10N or a space switch module 200 respectively.
Each first stage time switch 110-11N is connected to all of second stage space switches 210-21N by a respective junctor highway HW10-HW1N, and each second space switch 210-21N is connected each third stage time switch 120-12N respectively by a junctor highway HW20-HW2N. Control processors 130-13N, 230 are connected each other by a processor bus 400.
A communication path establishment from a subscriber terminal 1 accommodated in the line circuit 310 connected to the time switch module 100 to a subscriber terminal 1N accommodated in the line circuit 32N connected to the time switch module 10N will now be considered.
In this communication path establishment, such a connection is required from the first stage time switch 110 via the junctor highway HW10, the second stage space switch 21N, and the junctor highway HW2N to the third stage time switch 12N. First, the control processor 130 makes an inquiry about an idle time slot number available on both junctor highways HW10 and HW2N to the control processor 230 in the space switch module 200. The control processor 230 searches an idle time slot available on both junctor highways HW10 and HW1N, and then selects one of available time slot number. The control processor 230, which has found an idle time slot, reserves this idle time slot and notifies this information to the control processor 130. The control processor 130 instructs the time switch 110 to perform a time slot exchange operation from an incoming time slot to the time slot which has been informed by the control processor 230, also, the control processor 130 instructs the control processor 230 and the control processor 13N to perform path establishment in the space switch 21N and in the time switch 12N respectively. In the space switch 21N, the time slot which has been reserved on the junctor highway HW10 is switched to the same time slot on the junctor highway HW2N, and also, in the time switch 12N, a time slot exchange operation from the time slot on the junctor highway HW2N, informed by the control processor 130, to the time slot on the outgoing highway corresponding to the subscriber terminal 1N is performed.
As a result, the switching operation of the communication path from the subscriber terminal 1 to the subscriber terminal 1N has been completed.
In Japanese Patent Application Laid-Open No. sho. 63-50293, similar T-S-T structure switching network model of combining time switches and a space switch is described. In this publication, a configuration of a distributed switching network system which is constituted by coupling a plurality of switch modules, each switch module includes time switches and space switch, is proposed for improving independent characteristics of the control processor in respective switch modules, and it is proposed that highway from other switch module is connected to the space switch via the additional time switch. That is, the proposed configuration, which is a T-(T-S)-T structure switching network, can eliminate common management of busy/idle information on junctor highways to/from each space switch, and can perform switching operation by using own busy/idle information. It means that the control processor in each switch module can operate more independently, and can realize more independent distributed control system.
However, there is a problem, in the above-described conventional T-S-T structure switching network, that all of the connections within the switching network cannot be performed in the case that any one of the second stage space switches or the control processor in the space switch module fails, even when the time switch module including the first stage time switch and the third stage time switch is operated under normal condition. This is because that the means for connecting between the first stage time switch and the third stage time switch is interrupted.